Minutes of Weekly Meeting, 2011-08-22

Meeting called to order: 11:17 AM EDT

1. Roll Call

Ian McIntosh
Brian Erickson
Harrison Miles
Brad Van Treuren (joined 11:19)

Patrick Au
Heiko Ehrenberg
Eric Cormack
Carl Walker
Adam Ley
Tim Pender

2. Review and approve previous minutes:

08/08/2011 minutes:

  • Draft circulated on 08/08/2011.
  • No corrections noted.
  • Insufficient attendees for approval.

08/15/2011 minutes:

  • Draft circulated on 08/15/2011.
  • One correction noted: In comment by Heiko near the top of 4c, change 'od' to 'of'.
  • Insufficient attendees for approval.

3. Review old action items

  • Adam proposed we cover the following at the next meeting:
    • Establish consensus on goals and constraints
    • What are we trying to achieve?
    • What restrictions are we faced with?
  • All: do we feel SJTAG is requiring a new test language to obtain the information needed for diagnostics or is STAPL/SVF sufficient? see also Gunnar's presentation, in particular the new information he'd be looking for in a test language
  • Ian/Brad: Condense gateway comments and queries into a concise set of questions. - Ongoing
  • All: Forward text file to Ian containing keywords from review of meeting minutes. - Ongoing.
  • Carl/Brad: Get annotated keyword worksheets to Ian by Wednesday Close of Business. - Ongoing
  • All: Consider how a keyword can be used to define the chain configuration for a given test step, and what that keyword might be.
  • Ian: Circulate preview of ITC Poster to group. - COMPLETE

4. Discussion Topics

  1. ITC Poster
    • {Brad joined}
    • [Ian] I'm afraid I can't share the poster as without Carl on the call we have no 'host' and I can't claim the host role.
    • [Ian] I circulated the poster, and Brad provided some feedback. As a result I made a small change to the title of slide 8, replacing 'System' with 'Array' to tie it more directly to the other slides in the example, and remove the implication that this was a recommended SJTAG architecture.
    • [Brad] That change was enough to give the distinction I was looking for.
    • [Ian] I submitted it to Bill on Friday thinking that I may have been too late, but it was OK; some people still hadn't submitted their posters at all at that point.
    • [Harrison] I thought you'd have until the 1st at least.
    • [Ian] This year, for the first time, posters are being included on the Presentations CD-ROM, so the deadline for submissions was supposed to have been Monday 15th.
    • [Harrison] Is this a real world example? Is this something you got a customer to buy into?
    • [Ian] This is one of Selex Galileo's own products; it's our design.
    • [Ian] The logic for us in making this all JTAG programmable at the system level is that we can build boards that could be used in radars for several different customers, and commit the firmware only at the point the radar is built up. Otherwise we'd have all the nausea of having different part numbers for all the differently programmed boards and then if we find we need to repurpose a board build for one project to service another then we have a headache getting numbers changed as well as reprogramming.
    • [Brad] What you're saying is generally true of any new product introduction. It's the benefits you get of having an embedded JTAG capability in a new product. What you doing is taking advantage of the ability to reprogram with the covers on, upgrading from your baseline product.
    • [Harrison] I'm just surprised that anyone has actually got the buy in to take this into a real customer's product.
    • [Ian]It's not perfect; it's a workable solution with what we have available.
    • [Brad] It's not all that unusual: Just look at Motorola, Alcatel-Lucent or even Broadcom.
    • [Ian] We've probably had some level JTAG access at the box boundary for maybe 5 or 6 years now, but often only for one single box within the radar, like the Processor. This is the first time it's been mandated in the design brief to apply to the whole radar.
    • [Brad] I think maybe Harrison missed the discussion in Volume 2 of the White Paper, where the buy-in may be different for different organizations. Some people will see the big picture and see SJTAG as having several uses. Some will only be interested in a single use case but it still has value. What's important here is that there are lot's of people coming to this for a variety of reasons, so we can't just focus on one or two of them.
    • [Brad] Maybe you can put the poster onto the SJTAG website?
    • [Ian] OK, I can do that. {ACTION}
  2. Summer Newsletter
    • [Ian] Just to reiterate that I'm looking for suggestions for the next newsletter. I noted last time that some mention of ITC would probably be a lead item.
    • [Ian] I'll need to have suggestions by Monday 29th.
  3. September Meeting Schedule
    • [Ian] I'd like to talk about the schedule for September here, because I think there are few extra factors to consider this time.
    • [Ian] Monday 5th is Labor Day, so I'm guessing that's going to take most of you guys in the US out of the picture?
    • [Brian] It will indeed.
    • [Harrison] But that's only a few of us, isn't it?
    • [Ian] Actually, you're the majority, with Heiko, Adam, Tim, Carl, as well as yourself, Brad and Brian. Here there's Peter, Richard, Eric and Patrick.
    • [Ian] The 5th seems like it'll be a holiday for SJTAG.
    • [Ian] The 12th looks OK to me.
    • [Brian] I won't be able to make 12th.
    • [Ian] 19th won't work for me, as I'll be on a flight somewhere en route to ITC. I guess a few people will be caught up in that or already be at ITC.
    • [Harrison] Yes.
    • [Ian] 26th maybe doesn't work too well for me - I think I'll be wiped out travelling back from ITC and I'm thinking of taking that as a day off. And last year we skipped that Monday since it was so soon after the Fringe Meeting at ITC. But that doesn't mean there can't be a meeting that day.
    • [Harrison] So, is there a meeting at ITC? Do you have the room and time?
    • [Ian] I don't know the room, but I'm guessing there'll only be one meeting room anyway; the meeting is on the Wednesday afternoon, 2:00 - 3:00 PM.
    • [Harrison] Can you send out a notice on that, so I can put it in my diary?
    • [Ian] OK. {ACTION}
    • [Ian] Any thoughts on the 26th?
    • {Silence}
    • [Ian] I'll keep it in tentatively and maybe if we get more people on the call next week we can firm up the schedule.
  4. Explore communication between a pair of devices
    - Continue simple diagram development
    - Memories
    - Select new Use case
    • [Ian] There are probably a few things we could discuss, but maybe not anything that would be worth starting in the 10-15 minutes we have remaining today.
    • [Brad] Maybe we can use those few minutes to choose the next subject; I don't think we'd decided on that.
    • [Harrison] Are we treating FPGAs within the heading of 'memories'?
    • [Ian] That's a good question. I guess FPGAs are a memory device of sorts, but they're quite different.
    • [Brad] Yes, you're right that they're a hybrid, but I think they are a separate class. Although they have memory, the access is very different.
    • [Harrison] OK, the next one I'd suggest would be the intelligent devices, by which I mean Processors and DSPs.
    • [Brad] Yes, and network processors...
    • [Harrison] OK, but I think from our perspective we can group all of them under one group term.
    • [Brad] It is reasonable to group them. At some point we may find that we need to split out some special cases.
    • [Harrison] I think this is an important group because around 60% of all digital boards have some type of processor on them.
    • [Brad] Then you have FPGAs with soft processor cores.
    • [Ian] That's exactly what I was going to mention: Does that mean that those FPGAs span both the Processor and the FPGA categories?
    • [Brad] Yeah, that's what I meant when I said that we might need to split out special cases.
    • [Harrison] I think that gives us most of the atomic categories. There may be some subatomic categories. Maybe ASICs, they could be a form of FPGA but arguably ASICs came first.
    • [Ian] ASICs seem different, because they don't have the reconfigurability of a FPGA, and ASICs usually have BIST of some kind.
    • [Brian] ASICs also have a greater propensity for being mixed signal. And memories differ from gate array as most memories don't offer JTAG access.
    • [Harrison] I think the distinctions are getting blurred. ASICs all have some kind of self-test, because the guy making wants to know it works before he puts the lid on it.
    • [Brad] Then there are the Actel Fusion devices that are FPGAs with analog features.
    • [Harrison] DSPs are probably the true example of mixed signal devices. Maybe we're trying to create more categories than we need. Let's see if there are more similarities than differences first.
    • [Ian] OK, so what I have as subjects are FPGAs, then processors, and possibly ASICs in their own space.

5. Key Takeaway for today's meeting


6. Schedule next meeting

Next Meeting:
August 29th (11:00 AM EDT, 4:00 PM BST)

Schedule for August 2011:
Heiko will miss 29th.

Interim Schedule for September 2011:
12th, 26th
Brian will not be able to attend on 12th.

7. Any other business


8. Review new action items

  • Ian: Make the ITC Poster available on the SJTAG website.
  • Ian: Circulate details of the Fringe Meeting at ITC.

9. Adjourn

Brian moved to adjourn at 11:57 AM EDT, seconded by Brad.

Respectfully submitted,
Ian McIntosh