[SJTAG]

 The System JTAG Working Group

Minutes of Weekly Meeting, 2010-04-12

Meeting called to order at 10:35 AM EST

1. Roll Call

Carl Walker
Adam Ley
Brad Van Treuren
Eric Cormack
Michele Portolan
Peter Horwood
Brian Erickson
Heiko Ehrenberg (joined 10:43am)
Patrick Au (joined 10:52am)
Ian McIntosh (joined 11:02am)

Excused absence:
Tim Pender

2. Review and approve previous minutes:

03/22/2010 minutes:

  • Motion to approve: Carl
  • Second: Heiko
  • No objections or abstentions
    -> minutes approved

03/29/2010 minutes:

  • There was a typo in the preamble
  • Motion to approve: Heiko
  • Second: Patrick
  • No objections or abstentions
    -> minutes approved

3. Review old action items

  • Adam proposed we cover the following at the next meeting:
    • Establish consensus on goals and constraints
    • What are we trying to achieve?
    • What restrictions are we faced with?
  • All to consider what data items are missing from Data Elements diagram
  • All: do we feel SJTAG is requiring a new test language to obtain the information needed for diagnostics or is STAPL/SVF sufficient? see also Gunnar's presentation, in particular the new information he'd be looking for in a test language
    (http://files.sjtag.org/Ericsson-Nov2006/STAPL-Ideas.pdf)
  • Ian/Brad: Draft "straw man" Volume 4 for review - Ongoing
  • All: Review "Role of Languages" in White Paper Volume 4 - Ongoing
  • All: Review 'straw man' virtual systems and notes on forums:
    http://forums.sjtag.org/viewtopic.php?f=29&t=109. - Ongoing
  • All: Add to, or comment on, the bullet point list of architecture drivers. - Ongoing.
  • All: Provide forum comment on the graphics used during the meeting; suggest "building blocks" that may be used in future:
    http://forums.sjtag.org/viewtopic.php?f=29&p=257#p257 - Ongoing.
  • ALL: review / comment in preparation for upcoming meetings. - Ongoing
  • Ian/Brad: Consolidate PowerPoint diagrams used during recent meetings. - COMPLETE

4. Discussion Topics

  1. White Paper Volume 3 Review - Discussion of system description diagrams
    • - Consolidated slides
    • - New slide from Ian:
    • [Brad] Showing path selection on a board at an abstract level, for choosing one chain or another;
    • - Consolidated slides:
    • [Brad] What I've done is I've used Ian's graphics for the devices with a BScan register (slide 7)
    • [Brad] On slide 8 I left the BScan cells showing in the BScan device
    • [Brad] On slide 9 I then started removing the BScan cells, showing just the IC's as boxes, indicating the scan path between the devices
    • [Brad] Slide 10 shows two separate chains, as a precursor to introducing scan path switching (dynamic paths)
    • [Brad] On slide 11 I show a new box for Dynamic Path Selection, linking the two separate scan chains (static paths) to one TAP on the backplane; I'm showing two options:
      • selecting one of the scan chains
      • bypassing the whole chain
    • [Brad] Slide 12 shows an external path scheme; I left the graphic as it was and added a question "The scan chain breaks if the mezzanine unplugs" Is there a way to resolve this? (Dynamic Path)
    • [Brad] Slide 13 then shows the Dynamic Path Selection as an option to bypass the external scan chain (mezzanine)
    • [Brad] How do you guys feel about the flow of the slides now
    • [Heiko] I'd say it is an improvement
    • [Patrick] I agree
    • [Brad] Are there things missing so far, or are things simplified too much
    • [Patrick] I don't think so
    • [Brad] Starting with slide 15 we show the handling of multiple scan chains
    • {Ian joined}
    • [Brad] Slide 15 shows individual chains being daisy-chained, the simplest configuration at the board level;
    • [Brad] Slide 16 introduces Dynamic Path Selection Logic to select individual scan chains on a board and an external scan path on a mezzanine card; this may be a new concept for some people doing Boundary Scan
    • [Brad] Slide 17 shows a similar graphic, but now the TMS is shared and the TCK is separate/independent for each chain
    • [Brad] Slide 18 introduces radial / star topology, where each static path is wired independently to the Dynamic Path Selection Logic
    • [Brad] Next I was considering about introducing IEEE 1149.7 scan chains; but then I thought this may not be the right place to introduce this
    • [Ian] I agree that at this point in the discussion of the architectures we should stick with the standard 1149.1 configurations and then introduce 1149.7 and other newer technologies at a later time
    • [Adam] I'm fine with that
    • [Brad] Does anybody object to removing slides 19 and 20?
    • {no objections voiced}
    • [Brad] Then we'll remove slide 19 and slide 20 from this slide deck; and this is what I had so far or scan chain architectures
    • [Ian] It seems to me that we'll have to redraw most of the diagrams shown in the original white paper; the original diagrams show a lot of detail that may be too distracting (e.g. FPGA, 1149.6, etc.) and may not be necessary at this level;
    • [Carl] I agree
    • [Brad] And our goal here is to show that the system-level path configurations are kind of just an extension of what we already know about board-level path configurations
    • [Brad] What I wanted to achieve with this section is to be able to show just a single TAP at the board level, where everything below it can collapse, but I don't think I quite got there yet, there is still too much detail
    • [Ian] We don't want to use up resources/pins at the TAP Interface so we need to use path selection as part of your solution for that.
    • [Ian] Going from board level to system level is the same problem as managing multiple scan chains at the board level;
    • [Brad] I still need to work on these graphics a bit
    • [Ian] The elements from slide 11 could used for a simplified version too
    • [Ian] We almost have a color scheme here now, so we could omit the text from inside the blocks
    • [Peter] A color key might prove helpful, especially if we change the way we represent the scan chain selection (details on one slide, general blocks on another slide)
    • [Brad] That's all the slides I have to show so far
    • [Ian] I can take an action to come up with some more reducible graphics to represent boards

5. Schedule next meeting

Monday April 26, 2010, 10:30 AM EDT
May 3, 2010; 10:30am EDT
May 10, 2010; 10:30am EDT
May 17, 2010; 10:30am EDT; Heiko may not make this call
May 24, 2010; 10:30am EDT; Heiko won't make it to this call

6. Any other business

No other business.

7. Review new action items

  • Ian to come up with some board representation graphics

8. Adjourn

Brad moved to adjourn at 11:41 AM EST, seconded by Peter.

Heiko

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