Minutes of Weekly Meeting, 2013-06-24

Meeting called to order: 11:05 AM EDT

1. Roll Call

Ian McIntosh
Eric Cormack
Patrick Au
Peter Horwood
Brian Erickson
Carl Walker
Adam Ley (joined 11:08, left 11:59)
Heiko Ehrenberg (joined 11:10)
Brad Van Treuren (joined 11:11)

Excused:
Harrison Miles

2. Review and approve previous minutes:

6/10/2013:

  • Updated draft, with key takeaways inserted, circulated 6/13/2013.
  • Brad moved to approve noting that one or two typos may need to be advised, seconded by Eric. No objections or abstentions.
  • {Post meeting note: No corrections were identified}

3. Review old action items

  • All: do we feel SJTAG is requiring a new test language to obtain the information needed for diagnostics or is STAPL/SVF sufficient? see also Gunnar's presentation, in particular the new information he'd be looking for in a test language
    (http://files.sjtag.org/Ericsson-Nov2006/STAPL-Ideas.pdf)
  • Harrison will attempt to come up with a table of use cases and their associated layer and what can be done at that layer. Ongoing.
  • Ian/All: Look for real world examples of boards that we could take through from board test to a system test implementation as a worked example case. Ongoing.

4. Reminders

  • Consider Adam's three points (from the action from the first weekly meeting) and suggest what is preventing us from answering those questions:
    • Establish consensus on goals and constraints
    • What are we trying to achieve?
    • What restrictions are we faced with?
  • Forum thread for discussion: http://forums.sjtag.org/viewtopic.php?f=3&t=172

5. Discussion Topics

  1. Status of Newsletter subscriber reverification.
    • Ian reported that the reverification exercise began on June 3, and 30 responses were received over the following two weeks, the vast majority within the first few days. A reminder was sent out on June 17 to those that were still unconfirmed, and this brought in 5 further responses. As the WG members were excluded from reverification, this leaves the number of active subscribers at 47, from an original total of 86. Ian was aware that a few of the remaining email addresses were likely to be invalid.
    • The intent was to close the reverification exercise on July 1 and at this point Ian could still send out a final reminder, but felt that those that were seriously interested in SJTAG had already replied. Brad agreed, but asked if a sign-up page can be provided for anyone who finds that they've been dropped to resubscribe. Ian noted that this already exists on the Contact page, but that he would post a note on the Home page drawing attention to this once the exercise closes on July 1.
    • Brad was encouraged by the level of response, and had been anticipating a much poorer level of resubscription and felt this showed that there was still a real interest, despite SJTAG still not being under a PAR.
    • On a loosely related note, Ian reported that following the SJTAG site outage suffered in January as a result of problems created by the hosting service during a service 'upgrade' he would be moving the website to a new webhost. This would take place after the current subscriber reverification exercise is complete in order to minimise any impact on the database. All website URLs and services will remain exactly as they are, so there should be no appreciable impact for users, although there may be a little downtime during the transition while the DNS changes are propagated.
  2. Expanded discussion of Delegating Controller from System Examples slides.
    • {System Examples slide 6 shared}
    • Ian explained that he was hoping to use today's discussion to explore what additional features or options could be added to the typical board diagram and one example was the JTAG accessible memory that Brad had mentioned for storing the board's test vectors for JTAG Plug'n'Play. Ian also noted that he didn't expect to differentiate between a 'Master' or 'Slave' board. Brad noted that any architecture of this sort would rely on some form of arbitration to determine the master but presumed that Ian was suggesting that the arbitration method was outside of SJTAG's scope.
    • Regarding the test vector memory, Ian asked if this might also be used to store module identification data. Brad agreed that it could but wanted to point out that the memory need not be directly JTAG accessible, but could be on, e.g., SPI if the gateway or selector could provide an appropriate translation. The instrument interface to that memory is perhaps something that SJTAG can define.
    • Ian wondered if, for the purposes of illustration, the Test Vector Store and Module ID Store should be shown as two separate entities, both being optional. Brad agreed that they should be separate entities, but that they could coexist.
    • Ian also wondered if the diagram should include a translation to a Dot7 network; P1687 was another thought but in this context it seemed to be covered by Dot1 to the chip boundary. Brad remarked that the group had not really considered how to support a 2-wire interface at either the board or system levels, noting that there was now some interest in using the 2-wire interface at system level to save pins.
    • Heiko noted that the diagram made no reference to whether a 4-wire or 2-wire interface was used and wondered if it was even necessary to make a distinction. Ian replied that his objective was to try to illustrate the variety of features that might be present in a design so that the group could explore how each might be addressed by a standard.
    • Brad thought there may be some board level issues and some system level issues that while related, were distinct from each other. Ian recalled that Dot 7 did have some tentative idea of possible board or system application. Adam responded that Dot7 made no presumption about addressing system aspect but nor does it preclude it. There had been some discussion, mainly electrical considerations such as the possible need for repeaters in networks that involve more than a few chips.
    • Ian felt that current component availability would tend to drive system level usage towards Dot1, 4-wire schemes for the time being, although Brad noted that some vendors of processors and DSPs were declaring an intent to move to 2-wire in upcoming products. In reply to a question from Adam, Brad added that this would be at the exclusion of a 4-wire TAP. Ian noted that would still imply a need for bridging between 2-wire and 4-wire to accomodate many existing parts. Brad remarked that there was a need to test the connectivity between Dot7 and Dot1 devices which implies coordination of the networks.
    • Brad felt this was moving more towards something that should be added to our primitives. Ian agreed, but thought that we still needed a representation that could engage the designer in what was possible; the primitives possibly expected the reader to already be aware.
    • Another feature that Brad thought hadn't been considered so far was the option for a dedicated BScan engine in a FPGA or ASIC, rather than in a uP, that would run a set of test vectors, primarily as part of POST. Brad felt that possibly more than 85% of people using an embedded BScan would only want POST support. Ian noted that such dedicated engines could be used within Continuous BIT too, but agreed that it would always be harder to arrange.
    • Ian agreed to prepare an expanded diagram based on the items discussed. {ACTION}

6. Key Takeaway for today's meeting

  1. Need to consider how dot7 networks can be included within board or system designs.
  2. The majority of embedded BScan applications will only be used for POST.

7. Schedule next meeting

Next Meeting:
July schedule:
8, 15, 22, 29

As several people indicated that they'd be absent on July 1 there will be no meeting on that date.

8. Any other business

  • {Adam left}
  • Still no contact from Bill Eklow. Brad suggested that Ian enquires how Bill would envisage accommodating SJTAG, given that special arrangements are seemingly being made for iNemi at ITC.

9. Review new action items

  • Ian: Draft revised generic board diagram to include features discussed today.

10. Adjourn

Eric moved to adjourn at 12:03 PM EDT, seconded by Heiko.

Respectfully submitted,
Ian McIntosh