Minutes of Study Group Meeting, 2017-08-21

Meeting called to order: 11:08 AM EDT

The slide references relate to the pack used during this meeting and located here: http://files.sjtag.org/StudyGroup/SG_Meeting_2.pdf

1. Roll Call

Ian McIntosh (Leonardo MW Ltd.)
Heiko Ehrenberg (Goepel Electronics)
Brad Van Treuren (Nokia)
Eric Cormack (DFT Solutions Ltd.)
Bill Eklow (Retired)
Brian Erickson (JTAG Technologies)
Peter Horwood (Firecron Ltd.)
Carl Walker (Cisco Systems)
Richard Pistor (Curtiss-Wright)

By email (non-attendees):

Adam Ley (ASSET Intertech)

  • Adam Ley was in attendance at the start of the call, but had to leave at the call-to-order.
  • Zdeněk Plíva (TUL) attempted to join the call around 11:35, but was seemingly unsuccessful.

2. IEEE Patent Slides

  • {Slides 5-9}
  • Noted that the requirement to notify relevant patents applies all patents known to participants, not just those patents held by the participant's organisation.

3. Review and Approve Previous Minutes

  • August 14
    • Updated draft circulated 8/16/17
    • No further corrections
    • Brian moved to approve, seconded by Eric, no objections or abstentions. Approved.

4. Review Open Action Items

  • None.

5. Discussion Topics

a) Study Group Guidelines (from IEEE)

  • {Slide 10}

b) ITC Poster

  • {Slide 11}
  • This may be published in the proceedings, so a full page abstract offers a chance to get more of the work we're doing across. This is different to a full paper, where only a paragraph is required: The paper backs up the abstract, but for a poster the abstract is all there is.
  • Group may need to assist in expanding the text presented here.
  • Bill will see if the 1687.1 abstract can be obtained as a guideline {Action}.
  • Bill asks if we have a preferred time for a fringe meeting at ITC. This is probably up to Heiko, as the default "group representative" at ITC.

c) Refresher on previous SJTAG work

  • JTAG Multidrop Bus {slide 12}
  • Taken from original SJTAG White Paper (http://files.sjtag.org/WhitePaper/SJTAG_white_paper_0.4.pdf)
  • JTAG Protocol Manager is a 1149.1 bridge/controller - a JTAG Master. This works with the microprocessor during embedded testing and which can either be of the host board or fed back out onto the bus to test other boards.
  • As shown, B1 and B2 are identical boards, so there is redundancy in embedded test controllers available.
  • SJTAG Proof of Concept Demo, 2006 {slides 13, 14}
  • Presented at EBTW 2006, these slides are from http://files.sjtag.org/EBTW2006/Minutes/SJTAG-Demonstrations-BTW-2006.ppt
  • Tests generated by Asset toolset, exported and converted to run from an embedded Firecron execution host. Test result could be diagnosed by the Firecron tools or passed back to the Asset tools.  
  • Moving SVF and STAPL files for execution by a third party had been done before; what was new here was returning the test result data from the third party execution in a form that the originating toolset could run diagnostics as if the target were directly connected.
  • The 'Translator" for the result files was located on the Asset workstation but could have been hosted by the target.
  • The context (i.e. whether the test was an infrastructure test or an interconnect test) was generally known or could be inferred which assisted the third party tools in performing the diagnostics. 
  • A key point is that this technique uses pre-generated, static test vectors.
  • IJTAG Engine, 2014
  • {Slide 15}
  • Design & Test article co-authored by Michele Portolan and Brad Van Treuren.
  • This drove much of the discussion around the separation of "Access Links" from "Data Links".
  • Arose from IJTAG/1687 moving away from static vectors and introducing variable length vectors. This needed an alternate execution engine from the traditional static vector player.
  • Also introduced the notion of needing to support interfaces beyond 1149.1, although there had been some awareness of this from Brocade using I2C to control JTAG path selection.
  • Ties in to 2005 debate between Brad Van Treuren and Mike Westermeier on whether STAPL was enough for SJTAG or if more languages were needed. See BTW 2005 presentations:
  • System Data Elements
  • {Slide 16}
  • Concept that a system is generically an "assembly of assemblies". The definition of a "system" may not be rigid and depends on the perspective of the viewer. A SoC may be just as much a "system" as a collection of racks.
  • Each level (SoC/MCM, Board, Rack) requires similar data to describe it (netlist, BoM, etc.), although the formats may be different.
  • SJTAG "Universe"
  • {Slide 17}
  • Attempts to show that SJTAG offers opportunities that conventional JTAG may be missing.
  • Noted that the operations shown here could be performed by embedded as well as external controllers.

6. Today's Key Takeaways

  • None.

7. Glossary Terms from This Meeting

  • None.

8. Topic for next meeting

  • 1687.1 perspective on SJTAG
    • Ian will circulate the slide that Jeff Rearick highlighted.

9. Schedule next meeting

  • August 28. UK Bank Holiday, Peter will be absent.

10. Reminders

  • None.

11. Any Other Business

  • None.

12. List New Action Items

  •  Bill: Ask Al Crouch about sharing the 1687.1 poster abstract with the group.

13. Adjourn

  • Eric moved to adjourn, seconded by Brad.
  • Meeting adjourned at 12:05 PM EDT

Respectfully submitted,
Ian McIntosh