Minutes of Study Group Meeting, 2017-10-09

Meeting called to order: 11:05 AM EDT

The slide references relate to the pack used during this meeting, located here: http://files.sjtag.org/StudyGroup/SG_Meeting_8.pdf

1. Roll Call

Ian McIntosh (Leonardo MW Ltd.)
Heiko Ehrenberg (Goepel Electronics) (joined 11:10)
Brad Van Treuren (Nokia) (joined 11:40)
Eric Cormack (DFT Solutions Ltd.)
Bill Eklow (Retired)
Brian Erickson (JTAG Technologies)
Peter Horwood (Firecron Ltd.)
Carl Walker (Cisco Systems)
Ed Gong (Intel Corp.)
Bill Huynh (Marvell Inc.)
Joel Irby (ARM)
Dilipan Jayachandran (SEL)
Teresa McLaurin (ARM) (joined 11:15)
Naveen Srivastrava (Nvidia)
Louis Ungar (ATE Solutions)
Sivakumar Vijayakumar (Keysight) (joined 11:06)

By email (non-attendees):

Terry Duepner (National Instruments)
Roger Lin (Via CPU Platform Inc.)
Mukund Modi (NAVAIR Lakehurst)
Russell Shannon (NAVAIR Lakehurst)
Jon Stewart (Dell)

2. IEEE Patent Slides

  • {Slides 5-9}

3. Review and Approve Previous Minutes

  • {Slide 10}
  • October 2
    • Updated draft circulated 10/04/17
    • No further corrections noted.
    • Eric moved to approve, seconded by Carl, no objections or abstentions. Approved.

4. Review Open Action Items

  • {Slide 11}
  • No open actions.

5. Discussion Topics

a) Scope and Purpose

  • {Slide 12}
  • Considering "Purpose" - what is it that we want SJTAG to do for us?:
    • PAR Guidance notes don't help say what the Purpose should be, but it should give the broad view of what the standard aims to do. This becomes more focussed in the scope, such that there may be several scopes (standards) serving a common purpose, if necessary.
    • Provisional Purpose {shared from forum post http://forums.sjtag.org/viewtopic.php?p=1176#p1176} highlights a few particular points that the Initiative Group had felt important:
      • Support interfaces that can be modelled as using the Capture-Shift-Update cycle.
      • Description based on topology and behaviour.
      • Get data to the destination registers in the correct time order.
    • May be getting too much into implementation details that should be left to the Working Group. Need to think "why are we doing this?" first, so should consider the Need first.
    • Should we say "SJTAG" or not - might imply that we're making I2C and SPI interfaces to boundary scan registers. The title should be more descriptive.
    • Study group title is a "working title" for the study group alone. The working group title (and standard title) could be different. The standard title will usually need to be fairly specific, and begin "Standard for ...".
    • Once the Need, Purpose and Scope are clear then an appropriate title should be apparent.
    • Considering Need, IJTAG (1687) needs to get expanded to the board level; it is pretty much only at the chip-level just now. How do we get instruments co-ordinated?
    • IJTAG is largely about tools: ICL and PDL gets retargeted.
    • Chip companies may not like exposing too much of what is inside their parts.
    • The analog test group is incorporating 1687 by possibly extending it (as 1687.2) - there is no reason we cannot expect 1687 to encompass hierarchy and go from IC to board-level (even subsystem-level) applications.
    • A problem is moulding all of the models into a single "netlist" for the higher level assembly. 
    • 1687 really only describes a single 1687 network and does not do anything directly that manages cases where there may be more than one network or networks behind networks.
    • Are we trying to create this hierarchy, e.g. for diagnostics?  What we want is access to the data that lies within the instruments, how you then interpret that data is a matter for the application. The access mechanism has no idea how the data will be used.
    • It is inevitable that a design will not be purely 1687, or 1149.1-2013. There will be plenty of pre-2013 1149.1 components or devices with I2C or SPI interfaces (and others) and the hope would be to get the best test access possible out of what the design gives us.
    • SJTAG and IJTAG started at around the same point. IJTAG was looking at what was inside the chip, SJTAG at what was outside, so system but also board. It could have been called "External JTAG" (akin to EXTEST and INTEST) although that could become confusing when considering externally controlled test versus embedded test control.
    • Scope follows Purpose, Purpose follows Need and the title needs to be in line with the Need. Title should be incorporated somewhere in the Need.
    • 1687, 1149.1, I2C, etc. are all "test accesses" (or potentially are). The standards for those only track data from a "leaf" - what a register does, what a bit in a register means - but there's still a need to flow that up through a hierarchy to the application. Diagnostics, as an example, comes from the application. 

6. Today's Key Takeaways

  • {Slide 13}
  • Should focus on Need first.

7. Glossary Terms from This Meeting

  • None.

8. Topic for next meeting

  • Scope, Purpose, Need (and title) - continued
    • Group may wish to continue the discussion via email or the forums in the interim (forums are preferred, as it helps maintain a record).

9. Schedule next meeting

  • October 16.
    • Heiko expects to be absent.

10. Reminders

  • None.

11. Any Other Business

  • A draft of the poster is available on the File Manager: http://files.sjtag.org/ITC2017/ITC_2017v2.pdf
  • Might be more informative if the Venn diagram ("SJTAG Universe") showed hierarchy in some way.
  • "Need" statement at bottom right still implies orientation towards "vectors".

12. List New Action Items

  • None.

13. Adjourn

  • Eric moved to adjourn, seconded by Louis.
  • Meeting adjourned at 12:08 PM EDT

Respectfully submitted,
Ian McIntosh