SJTAG Newsletter


Issue 28 - Q3-2014

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Upcoming SJTAG Green Papers

(A description of SJTAG Green Papers can be found here.)

In the coming editions of the SJTAG Newsletter, we will be exploring some of the problem domains exhibited by various SJTAG Use Cases which may or may not have solutions available with existing industrial standards. The intent of these Green Papers is to inspire collaboration and dialog between members of this industry; also to help educate you to the unique difficulties faced moving forward with providing support at the board and system level for testing, programming, and debugging systems with various levels of complexity.

Paper 1: The first paper presents the contrast between two groups of Use Cases where one domain requires the implicit definition of access while the second requires the explicit definition of access to a target entity. It will inform you to the broad behavioral requirements on what was presented in the last newsletter for supporting Access Links and Data Links.

Description: Use Cases

Figure 1 - SJTAG Use Cases

Paper 2: The second paper discusses the contrast between the need to support pre-generated tests, which are able to be replicated for factory testing, versus the need to support interactive configuration and control of an entity during Design Verification Test, Hardware Debugging, and Software Debugging. Both aspects are required to support the introduction of new designs and SJTAG needs to be able to support both domains.

Paper 3: The third paper uncovers how the JTAG based processor debug technology is really a specialized case of an embedded instrument that can be supported at not only the board level, but also at the system level. There are some unique aspects to this instrumentation that provide keen insight into the problem domain of JTAG Bridges to other protocols controlling instruments in devices.

Paper 4: The fourth and final paper in this series explains how a special class of instrument implementations used inside FPGA devices present problems for current standards targeting this problem domain. These special instruments leverage Intellectual Property provided by the FPGA vendor, which leverages the internal processor bus yielding an indirect access to the back end instrument from the JTAG interface. Thus, the description of the instrument behavior is masked by the generic JTAG interface instrumentation to the internal processor bus.

Description: MBIST

Figure 2 - MBIST Ecosystem

We hope you will find this series of Green Papers to be useful in your understanding of this fascinating problem domain of SJTAG.

From the Chair

Conference Update

In our last newsletter I mentioned the 2013 Board Test Workshop in Austin and I'm going to mention it again! BTW 2014 is back as an IEEE sanctioned event and will again be held in Austin, a little earlier than last year: September 9-11.

Unfortunately, I won't be able to make the trip this time but others from the SJTAG team will be present and we may have something to present, based on the samplers you see in the main item in this newsletter.

BTW '14 Website:

Green Papers

As you can see, we will be releasing a series of Green Papers discussing aspects of the SJTAG problem domain.

As we believe these will be thought provoking, and perhaps even controversial, we want allow some time for debate between each paper so publication will be roughly coincidental with these newsletters: We'll present an outline summary in the newsletter and the full article on the SJTAG website.

SJTAG Website:


There are several newsfeeds available on the SJTAG website. On the main site, you can obtain feeds from:

The forums offer a range of feeds at the overall board, forum or individual discussion thread level to suit your preferences, while our wiki supplies a feed from the Recent Changes page.

Description: News Feed

Next Newsletter

The Q4-2014 edition of this newsletter will be published towards the end of October 2014. Copies of past newsletters are always available on the SJTAG website.

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